PRE Routes a RISC-V Core on Three Open-Source PDKs: sky130, GF180MCU and IHP SG13G2
PRE, Ramtera's place-and-route engine, now takes a 32-bit RISC-V core from a synthesized netlist to a fully routed layout on three open-source process design kits: SkyWater sky130, GlobalFoundries GF180MCU and IHP SG13G2. The same engine and the same flow run on all three nodes.
Every layout was checked for connectivity in KLayout, independently of PRE's own checks: zero opens and zero unreached pins on every design and every node. The gcd block closes fully clean on sky130, with every net routed, zero DRC violations and zero opens, in about a minute.
What Was Run
Designs. The public OpenROAD-flow-scripts design set: the gcd arithmetic block, the riscv32i RISC-V core, and a 16-bit variant of the same core that we use as a fast testbed, plus the spi block on IHP. Anyone can download the same netlists.
Nodes. Three public PDKs, each with its own metal stack and rule set:
| PDK | Foundry | Process |
|---|---|---|
| sky130 | SkyWater | 130 nm CMOS |
| GF180MCU | GlobalFoundries | 180 nm CMOS |
| SG13G2 | IHP | 130 nm SiGe BiCMOS |
Flow. From netlist and SDC to routed DEF, every stage runs inside PRE:
- Floorplan (die and core from the target utilization)
- Global placement (nonlinear Nesterov optimizer)
- Legalization
- Clock tree synthesis with clock-buffer insertion
- Timing optimization: gate sizing, buffering and hold fixing
- Global routing
- Detailed routing
- Pre-route and post-route timing reports
What the Results Show
Connectivity. All nets routed on every design and node. A KLayout net trace on the final DEF and LEF, run independently of PRE, finds zero opens and zero unreached pins across all nine layouts.
Clock trees and timing. Clock trees were synthesized on all three nodes. Hold timing is met on all three without a single hold buffer. Setup timing is met on the 16-bit core on sky130 and IHP; setup closure on the 32-bit core is in progress.
Placement. Placement is where PRE is strongest:
- On our benchmark set, PRE places with 24–51% lower half-perimeter wirelength (HPWL) than OpenROAD.
- On gcd, OpenROAD's own detailed router, given PRE's placement instead of OpenROAD's, produced 27.6% less wire and 40.8% fewer vias.
- On GF180MCU and IHP, the 16-bit core comes out with slightly lower cell area and HPWL than OpenROAD's flow.
A clean small block. gcd on sky130 closes with every net routed, zero DRC violations and zero opens in about one minute.
Why Open PDKs
The designs and the PDKs are public, so anyone with the same files can reproduce these results; nothing here rests on a private testcase. sky130, GF180MCU and SG13G2 are also the three nodes the open-silicon community uses most, so one engine is exercised against three different metal stacks and rule sets.
Commercially, PRE is being readied for GlobalFoundries 22FDX. Paired with LVR, Ramtera's DRC/LVS/ERC/PEX engine, it forms a netlist-to-signoff flow on GlobalFoundries nodes.
Where PRE Stands
Small blocks close clean. The RISC-V cores route to completion with connectivity verified; the current work is closing the last DRC violations on the 32-bit core and bringing runtime down. Each fix targets a confirmed root cause rather than tuning for a benchmark, and the results on this page are refreshed as the engine improves.
About PRE
PRE is a complete place-and-route engine built over six years in Bangalore. It is developed by Dr. Sameer P, PhD (IIT) in placement and partitioning and former postdoc with the OpenROAD team at the University of California.
- Global placement with a nonlinear Nesterov optimizer, followed by legalization
- Clock tree synthesis with clock-buffer insertion
- Timing analysis and optimization: gate sizing, buffering and hold fixing, pre-route and post-route
- Global and detailed routing with a built-in geometry checker
- Inputs: LEF, DEF, Liberty and SDC. Output: routed DEF
- Tcl console for scripting and batch runs
- Multithreaded, runs on a standard Linux workstation
Try PRE on Your Block
If you have a block on sky130, GF180MCU or IHP SG13G2, send us the netlist and SDC under NDA and we will run it through PRE and return the routed DEF with the metrics. Teams designing on GlobalFoundries 22FDX can ask about early access.
Contact: Dr. Sameer P, Founder & CEO, Ramtera Inc. · sameer@ramtera.com · +91-7259103580 · www.ramtera.com
About Ramtera
Ramtera Inc. is an EDA company incorporated in the US with R&D in Bangalore, India. It builds two products: LVR for physical verification and PRE for place and route. Together, on GlobalFoundries nodes, they form a netlist-to-signoff flow. Ramtera holds five granted patents, and LVR and PRE are registered trademarks of Ramtera.
SkyWater, GlobalFoundries, GF180MCU, 22FDX and IHP are trademarks or names of their respective owners. OpenROAD and KLayout are open-source projects. Ramtera is not affiliated with or endorsed by any of them. The results described here are Ramtera's own measurements.
Have a Block on sky130, GF180MCU or SG13G2?